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  Synopsys DC-T培訓
   入學要求

        學員學習本課程應具備下列基礎知識:
        ◆ 電路系統的基本概念。

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       每期人數限3到5人。
   上課時間和地點
上課地點:【上!浚和瑵髮W(滬西)/新城金郡商務樓(11號線白銀路站) 【深圳分部】:電影大廈(地鐵一號線大劇院站)/深圳大學成教院 【北京分部】:北京中山學院/福鑫大樓 【南京分部】:金港大廈(和燕路) 【武漢分部】:佳源大廈(高新二路) 【成都分部】:領館區1號(中和大道) 【沈陽分部】:沈陽理工大學/六宅臻品 【鄭州分部】:鄭州大學/錦華大廈 【石家莊分部】:河北科技大學/瑞景大廈 【廣州分部】:廣糧大廈 【西安分部】:協同大廈
最近開課時間(周末班/連續班/晚班)
Synopsys DC-T培訓:2020年3月16日
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  Synopsys DC-T培訓
培訓方式以講課和實驗穿插進行

課程描述:

?

Overview

This workshop familiarizes you with the physical constraints that enable the strong DC-T correlation with physical tools. Through a combination of class lecture and hands-on labs, you will learn what the physical constraints are, how to load them into DC-T, how to view them, and how to verify they are complete and correct.

As part of the set up and run methodology, you will generate scripts using the Reference Methodology Script Generator (RMgen), and will adapt them to your design.

This workshop covers typical flows (flat, both with and without a floorplan, and hierarchical). It describes how the power and test flows fit into the DC-T flows. It covers methodologies that are common across all flows.

This workshop shows you how to setup for, analyze, and handle congestion, using text reports to quantify the congestion, and using the GUI to qualify it.

?

Objectives

At the end of this workshop the student should be able to:

  • Load the physical input files to DC-T and list the actions to be taken on them
  • Configure and generate RMgen “seed scripts” ,??and adapt those scripts to your design
  • Understand three frequently-used DC-T flows:

·???Classic flat with Power and Test with a floorplan

·???Classic flat with Power and Test without a floorplan

·??Hierarchical

  • Use methodologies common to all flows
  • Navigate the GUI to explore a floorplan
  • Set up for the most accurate congestion analysis
  • Analyze congestion using both text and GUI
  • Recommend congestion fixes

Audience Profile

Engineers familiar with Design Compiler using wire load models.

Prerequisites

To benefit the most from the material presented in this workshop, students should:

●?Have taken the Design Compiler 1 Workshop

Course Outline

Unit 1

·??Physical Elements

·??Set up and Run

·??Common Flows

·??Congestion

Unit 2

???DC Synthesis and optimization techniques, questions and answers

 

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